IEEE, IEEE Signal Processing Society, IEEE Circuits and Systems Society

L-DM: Design Methods

Time: Thursday, October 9, 16:00 - 18:00
Location: Commonwealth
Session Chair: Ed Deprettere, Leiden University
 
L-DM-1: POWER EFFICIENT DYNAMIC-RANGE UTILISATION FOR DSP ON FPGA
         Stephen McKeown; Queens University Belfast
         Roger Woods; Queens University Belfast
         John McAllister; Queens University Belfast
 
L-DM-2: HIERARCHICAL RUN TIME DEADLOCK DETECTION IN PROCESS NETWORKS
         Bin Jiang; LIACS
         Ed Deprettere; LIACS
         Bart Kienhuis; LIACS
 
L-DM-3: APPLICATION-DRIVEN ADAPTIVE FIXED-POINT REFINEMENT FOR SDRS
         David Novo; imec
         Min Li; imec
         Bruno Bougard; imec
         Frederik Naessens; IMEC
         Liesbet van der Perre; imec
         Francky Catthoor; imec
 
L-DM-4: LOW-COMPLEXITY POLYNOMIALS MODULO INTEGER WITH LINEARLY INCREMENTED VARIABLE
         Perttu Salmela; Tampere University of Technology
         Harri Sorokin; Tampere University of Technology
         Jarmo Takala; Tampere University of Technology
 
L-DM-5: SMARTCELL: A POWER-EFFICIENT RECONFIGURABLE ARCHITECTURE FOR DATA STREAMING APPLICATIONS
         Cao Liang; Worcester Polytechnic Institute
         Xinming Huang; Worcester Polytechnic Institute